A hardware-efficient gate set for superconducting qubits is shown to improve the performance of deep quantum optimization algorithms.

Quantum computers have the potential to solve problems that today’s computers cannot solve in a reasonable amount of time. However, their computations are not yet reliable, meaning that algorithms with many operations cannot be executed without significant errors. This article presents a method to reduce these errors by reducing the total number of operations required to execute a quantum optimization algorithm. This work thereby offers an approach to solving more complex problems on existing and near-term quantum computers.

The optimization algorithm considered in this work uses an Ising-type interaction between pairs of qubits. In prior work, this interaction was typically realized with a long sequence of standard quantum gates. By developing a gate that directly realizes the desired interaction, this work presents a hardware-efficient implementation that reduces the total number of gates executed on the quantum computer. This reduction in the number of gates results in a lower number of errors and, therefore, improves the overall performance of the algorithm.

The results demonstrate that using hardware-efficient gates is a key component in extending the impact of near-term quantum computers. In the future, the development of related types of hardware-efficient gates might enable quantum computers to tackle an even broader range of problems.

Paper in PRX Quantum on Deep Quantum Optimization Algorithms